As known per se, photovoltaic modules or “solar” modules, comprise one or several series arrangements of photovoltaic cells, each formed of a semiconductor absorption area interposed between a first conductive electrode and a second conductive electrode transparent to light, forming the surface on which the cell is illuminated by solar radiation. The first electrode is commonly called “back” electrode and the second electrode is commonly called “front” electrode.
For reasons of cost and simplicity of manufacturing, one of the technologies used, called “thin layer” technology, comprises collectively manufacturing the cells by depositing on an insulating substrate a stack formed, in the following order, of:                a first electrically-conductive layer,        a first semiconductor absorption layer,        a second semiconductor layer forming a heterojunction with the first semiconductor layer,        a second electrically-conductive layer transparent to light.        
The photovoltaic cells are then individualized by the forming of trenches in the stack.
Further, the series connection of two adjacent photovoltaic cells is preferably performed by manufacturing a connection area in the stack, which defines both the individualization of the two cells and connects a front electrode of one of the cells to the back electrode of the other cell while only using the layers forming the stack.
This type of so-called “monolithic” electric connection has the advantage of not having to mechanically separate the cells to transfer them into a connection package performing their series connection, and also avoids the use of wire connections and of weldings. Further, it also provides a gain in terms of manufacturing cost and of compactness.
A method for manufacturing a photovoltaic module 10 of the state of the art is described in relation with FIGS. 1 to 5.
FIG. 1 is a simplified view of the front surface of a module 10 comprising five photovoltaic cells 12, 14, 16, 18, 20 series-connected by monolithic connection areas 22, 24, 26, 28.
FIGS. 2 to 5 are simplified cross-section views along plane A-A of FIG. 1 illustrating the method for manufacturing module 10.
FIG. 1 is not to scale, the width of monolithic connection areas 22, 24, 26, 28 having been exaggerated to make them more visible. Especially, length L of photovoltaic cells 12, 14, 16, 18, 20 usually ranges between 1 millimeter and some ten centimeters, said length L being even likely to exceed one meter, width l of photovoltaic cells 12, 14, 16, 18, 20 usually is on the order of one centimeter, while width m of monolithic connection areas 22, 24, 26, 28 usually ranges between 100 and 300 micrometers.
The method for manufacturing module 10 starts with the deposition of a conductive layer 30, usually a metal layer made of a hard metal, preferably molybdenum, on an insulating substrate 32, usually made of glass, of plastic, or of metal covered with an insulating layer.
For each monolithic connection area, an etching 34 is performed in metal layer 30 all along its length, for example, by means of a laser UV or IR laser delivering pulses lasting from a few picoseconds to a few nanoseconds (FIG. 2).
A semiconductor layer 36 having a thickness of a few micrometers, for example, 2 micrometers, is then deposited on metal layer 30 and etching 34.
Semiconductor layer 36 is usually made in the form of a bilayer having a first lower layer 38 and a second upper layer 40. Lower layer 38 performs the function of absorbing a predetermined electromagnetic radiation and is made of a polycrystalline alloy comprising at least copper, indium, gallium, and selenium, more commonly known as a “CIGS” alloy. Upper layer 40 forms a heterojunction with lower semiconductor layer 38, and is for example formed of a cadmium sulfide (CdS) layer having a thickness of a few tens of nanometers, for example, 60 nanometers.
A first trench 42 is then etched in the stack thus formed, along the entire length L thereof, all the way to first metal layer 30 (FIG. 3).
A conductive layer 44 transparent to light is then formed on semiconductor layer 36. Layer 44 for example comprises an electrically-conductive transparent layer 48 having a thickness of some hundred nanometers, for example, 500 nanometers, especially aluminum-doped ZnO (ZnOAl) (FIG. 3). Its function is improved by the presence of an optional layer 46, especially a very thin zinc oxide (ZnO) layer, typically having a thickness of a few tens of nanometers, for example, 50 nanometers, rather resistive, which enables to avoid the forming of short-circuits with semiconductor layer 36 when the surface state of layer 38 is not very good.
The material forming upper layer 48 thus fills trench 42 (FIG. 4). It should be noted that semiconductor layer 44 may also be formed of upper layer 48 only. The function of layer 48 is however improved by the presence of very thin and relatively resistive optional layer 46, which enables to avoid short-circuits with junction 36 when the surface state of lower semiconductor layer 38 is not good enough.
The method then carries on with the forming, for each monolithic connection area 22, 24, 26, 28, of a second trench 50, parallel to first trench 42, in the thickness of the stack thus formed, all along length L thereof and all the way to metal layer 30. In the example of the previously-described materials, layers 36 and 44 are friable and metal layer 30 has a greater hardness than layers 36, 44.
Second trench 50, like first trench 42, is usually made in a single step by scratching the stack with a stylus (FIG. 5).
Thus, the manufacturing of a monolithic connection area, area 22 in the example illustrated in FIGS. 2 to 5, results in delimiting two adjacent photovoltaic cells 12 and 14.
Especially, etching 34 separates back electrodes 52, 54 of cells 12 and 14, the electric insulation between the two back electrodes thus formed being performed by the semiconductor material of absorbing layer 38 separating them.
First and second trenches 42, 50 are formed above the same back electrode 54. Second trench 50, non adjacent to etching 34, separates front electrodes 56, 58 of cells 12, 14, the electric insulation between the two front electrodes 56, 58 thus formed being achieved by medium 60 filling second trench 50, usually air.
First trench 42 filled with the conductive material of layer 48, has the function of defining an electric path. Thus, connection area 22 defines an electric path illustrated by the arrows of FIG. 5, series-connecting these cells, that is, electrically connecting front electrode 56 of cell 12 to back electrode 54 of cell 14.
In the following, term “transversal” relates to the stack direction, illustrated by arrow X in FIG. 5, and term “lateral” relates to a direction perpendicular to the stack direction.
It should however be noted that the electric insulation between back electrodes 52, 54 depends on the value of total lateral electric resistance Rl of the semiconductor material area filling etching 34, and more specifically on its ratio to total transversal electric resistance RL of semiconductor layer 38.
Indeed, the electric current preferably flows along the path of least electric resistance, whereby it should be ascertained that lateral resistance Rl is much greater than transversal resistance RL.
To obtain this result, a very large width of trench 34 should be provided. Thus, for example, even though polycrystalline CIGS has a lateral linear electric resistance much greater than its transversal linear electric resistance due to the crystal growth direction on deposition of layer 38, it is necessary to provide a trench 34 having a width of at least 100 micrometers. Thereby, the width of the monolithic connection area is largely dictated by the width of etching 34. Thus, a non-negligible surface area is lost for photon absorption. Further, even though the width of etching 34 guarantees a minimum electric insulation between the back electrodes of two adjacent photovoltaic cells, such an electric insulation however still remains too low, so that leakage currents between two back electrodes can be observed, which adversely affects the general performance of the solar module. This defect is all the more aggravated as components are miniaturized.
Thus, prior art monolithic connection areas provide a significant gain in terms of cost, compactness, and easy connection, but are intrinsically limited as to the electric insulation of the back electrodes of photovoltaic cells.